Cellular networks today have evolved beyond pure means of speech services to services that include electronic mail, video communication, Internet surfing, etc. A consequence of such services includes higher power efficiency and higher data rates transfer in the cellular system. In Universal Mobile Telecommunications System (UMTS) cellular standard, Global System for Mobile Communications (GSM), Enhanced Data rates for GSM Evolution (EDGE) and Bluetooth, wireless communications imposes especially demanding requirements in terms of spectral quality of the modulation and the high bandwidth of the signals processed. The spectral quality of the modulation may include signal to noise ratio (SNR), bit error rate (BER), and spectral mask requirements, such that an efficient transmission and receiving of data transfer may be achieved. The high bandwidth of the signals processed may allow a relatively higher amount of data transfer for transmitting and receiving to accommodate the additional features in the cellular networks.
Polar transmitter architectures have certain advantages over other architectures. Such advantages may include the use of a non-linear power amplifiers, use of efficient power amplifiers, and reduced number of analogue components (e.g., filters and mixers). For example, a non-linear amplifier may produce an output that may not be directly proportional to the input, resulting in a better power efficiency for constant amplitude phase modulation compared to a linear power amplifier.
A polar transmitter may use a polar modulator in a transceiver to modulate the carrier frequency in transmitting the baseband data signals. The transceiver may be a component of wireless communications devices used for transmission and receiving of data. The polar modulator operates on a polar representation of the baseband data signal expressed in magnitude and phase.
A modulation of the baseband data signal to the carrier frequency may be performed by a phase-locked-loop component or PLL. In an implementation, the PLL may be a control system that generates a modulated signal having a fixed relation to the phase of a reference frequency or phase input signal. The PLL may also generate clock signals for devices such as a digital to analog converter (DAC) in the polar modulator circuit.
A modulated clock signal may be generated by the PLL to be used in the DAC, such that the amplitude of a carrier signal oscillation changes only during a zero crossing and that the amplitude remains synchronous with the phase. However, modulated clock signals generated by the PLL may have a superimposed phase noise that includes jitter of the clock edges. The jitter is not due to thermal noise or random effects, but is due to phase modulation in the PLL.
In polar transmitters, this type of clock jitter may have a greater affect on the DAC performance than other non idealities in circuit implementation. The clock jitter in the DAC may be a form of short variation in timing with respect to the ideal time position of the clock edges. The short variation may affect the duty cycle of the amplitude in the DAC circuit. The variation in duty cycle may result in a charge pulse error which may affect data transmission quality.
In certain implementations, a method used to minimize or eliminate the effect of the by modulation introduced clock jitter includes a pre-distortion to compensate the amount of clock jitter. The pre-distortion may sample or simulate the output of the jittered DAC pulse at a relatively high sampling rate to be able to represent small time jitter. The samples representing the small time jitter may be sent to the pre-distortion circuit through a prediction control. The pre-distortion may transmit a compensated signal to minimize or eliminate the effect of the clock jitter in the DAC pulse based on the calculated amount from the prediction control.
A pre-distortion may have a problem with the high sampling rate of the jittered output in the DAC generated pulses. The oversampling rate may immediately lead to high current consumption and to difficulties in circuit implementation. Therefore, the pre-distortion is implemented before interpolation on low clock frequency. Not using the digital pre-distortion may lead to an increase in the spectrum in proximity of the carrier. Analog counter measure to avoid the increase in spectrum may require a high quality analog filter that would have to be configurable for various channel frequencies and standards. Furthermore, the high quality filter may not be implemented in analog, for carrier frequencies from 800 Mhz to 3 Ghz.
The clock jitter in the DAC may be considered as an error signal in amplitude of the DAC pulse. The error signal in amplitude of the DAC pulse may be compensated using a digital pre-distortion or sometimes called digital multiplier circuit that may increase the amount of the input amplitude in the DAC circuit. The smaller pulse width may compensate the amplitude variations that may be caused by the clock jitter in the DAC generated pulses.